1. Field
The present invention relates to technology for non-volatile storage.
2. Description of the Related Art
Semiconductor memory has become more popular for use in various electronic devices. For example, non-volatile semiconductor memory is used in cellular telephones, digital cameras, personal digital assistants, mobile computing devices, non-mobile computing devices and other devices. Electrical Erasable Programmable Read Only Memory (EEPROM) and flash memory are among the most popular non-volatile semiconductor memories.
Both EEPROM and flash memory utilize memory cells that comprise a transistor with a floating gate that is positioned above and insulated from a channel region in a semiconductor substrate. The floating gate is positioned between the source and drain regions. A control gate is provided over and insulated from the floating gate. The threshold voltage of the transistor is controlled by the amount of charge that is retained on the floating gate. That is, the minimum amount of voltage that must be applied to the control gate before the transistor is turned on to permit conduction between its source and drain is controlled by the level of charge on the floating gate. Thus, a memory cell (which can include one or more transistors) can be programmed and/or erased by changing the level of charge on a floating gate in order to change the threshold voltage.
Typically, memory cells are arranged in columns and rows to form an array. Various control lines can be used to access and/or control the memory cells. In NAND flash memory, for example, bit lines connect to columns of memory cells and word lines connect to rows of memory cells. However, other arrangements can also be used.
When reading memory cells, various voltages are applied to the memory cells to determine whether the memory cells conduct in response to the conditions set up by the applied voltages. In the example of NAND flash memory, a bit line associated with a memory cell is pre-charged and read compare voltage is applied to a control gate of the memory cells. A sense circuit is then used to determine whether the memory cell conducted in response to the read compare voltage by sensing current flow or voltage changes on the bit line.
In some architectures, the same voltages will be applied to all memory cells being read. However, some memory cells will need a higher voltage while others may only need a lower voltage. For example, those memory cells farther from the voltage source may see a lower voltage due to line resistance. To overcome the voltage drop due to line resistance, a larger voltage must be driven. Since most systems apply the same voltages to all memory cells via their associated control lines, all of the memory cells will typically then receive the larger voltage.
It is beneficial, however, to minimize bit line voltages during read in order to reduce power consumption, reduce cell source loading and improve speed of operation. It is similarly beneficial to reduce the voltages used for other control lines in other arrangements of non-volatile storage.